A. Technical Field
The present invention relates generally to integrated circuits, and more particularly to methods, systems and devices of employing a single-wire data interface to program, debug and test a programmable element. Commands and associated data are time-multiplexed to a serial signal according to a data sequence protocol, and communicated between a programming entity and the programmable element via the single-wire data interface, efficiently reducing the pin count at an interface of the programmable element.
B. Background of the Invention
Integrated circuits incorporate millions of transistors on small chips to implement complicated functions, and are used in almost all electronic equipment and appliances today. For instance, a microprocessor is a single integrated circuit that incorporates computational functions of a central processing unit (CPU) in a computer. A microcontroller is another exemplary integrated circuit functioning as a main processing core that may be used to control an embedded system that performs one or several specialized functions. Microprocessors and microcontrollers account for almost all processors encountered in daily life, and have spanned all aspects of modern life, e.g., desktop computers, laptop computers, cellular phones, music players, global positioning system (GPS), washing machines, remote controls, motor controllers and medical imaging systems.
Many integrated circuits are programmable, and need an interface over which program codes are loaded, debugged, and tested. Sometimes, this interface may be applied to verify the integrated circuits as well. The program codes are stored in simple flip-flops or more complex memories, such as a non-volatile flash memory, in the integrated circuits. The interface needs to be compatible with the integrated circuits such that the program codes may be successfully loaded, and subsequently debugged and tested over it.
Joint Test Action Group (JTAG) Test Access Port, Serial Peripheral Interface (SPI), Inter-Integrated Circuit (I2C), Universal Serial Bus (USB) and synchronous serial data links are some interfaces widely employed for program loading, debugging and testing in various integrated circuits. Each of these interfaces requires multiple signals at the interface of an integrated circuit and its associated IC package. These signals are typically multiplexed with other non-programming signals on multiple pins in a complex manner. As the chip size of the integrated circuit shrinks, such pin arrangement bottlenecks the chip size, package size and thus, cost efficiency.
FIG. 1 illustrates an exemplary block diagram 100 of a JTAG system for programming, debugging and testing a programmable integrated circuit (IC) 102. The JTAG system 100 comprises the programmable IC 102, a programming entity 104, and a JTAG emulation probe 106. The programmable IC 102 further comprises a JTAG test access port 108, an execution unit (e.g., a CPU core) 110, an internal memory 112, and a read-only memory (ROM) 114 that is attached to the execution unit 110.
The programming entity 104 is a generic personal computer (PC) or a dedicated programmer hardware that generates program codes for the programmable IC 102. The JTAG emulation probe 106 is coupled to the programming entity 104. The programmable IC 102 may be a microprocessor, a microcontroller, a state machine, or a field-programmable gate array (FPGA). In this programmable IC 102, the execution unit 110 is coupled to the JTAG test access port 108, and the internal memory 112 is coupled to the execution unit 110. Program codes are provided by the programming entity 104, and ultimately loaded into the internal memory 112 included in the programmable IC 102.
The programming IC 102 is directly coupled to the JTAG emulation probe 106, and thus indirectly to the programming entity 104, via a five-wire JTAG data interface. The five-wire JTAG data interface is associated with five pins (TDI, TDO, TCK, TMS and RESET) on the programmable IC 102 for five respective signals of test data in, test data out, test clock, test mode select and system reset. System reset (RESET) is mainly used for state control during program loading and debugging. As the programmable IC 102 scales down in size, these four pins in the JTAG data interface may not be spared without compromising programmability of this system. The JTAG data interface takes up valuable input/output (I/O) resources, such as chip area for I/O circuit, in addition to the pins at the interface of the programmable IC 102.